Controversial take on 2-layer PCB designs:
If you're using both layers for signals without a dedicated return and reference plane (RRP), you're very likely headed for EMC test failure.
Why?
Because radiated emissions from differential mode currents—that is, your normal operating current—are proportional to the area of the current loop.
Bigger current loop → bigger enclosed area → bigger emissions → bigger chance of failing EMC.
Are there exceptions that pass?
Yes—but it depends.
Can you afford to risk failing the EMC test?
If your answer is yes, then good luck.
If your answer is no, then treat the return path and reference plane with the same care as your signal traces.
Sometimes, failing EMC is just that simple:
Choose the wrong stackup, and you end up in the EMI failure spiral.
-Dario
P.S. Want to actually master EMI control and pass EMC?