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GROUNDED: Your PCB, EMC/EMI, and SI Nuggets

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Dario Fresu

PCB Hacker - Team

PCB Hacker - Founder

Failing an EMC test because of a poor PCB layout is extremely easy!



In this simulation made with Simbeor, we can see how routing multiple traces over a split plane increases crosstalk among the signals.


You can observe how the EM fields propagate through the stackup of the PCB, influencing one another.


Imagine if one of those signal traces is connected to the reset line of the MCU, while another is part of the communication bus and connected to a cable that exits the PCB into the environment.


A simple interference, if not well-managed, can enter the board via the communication bus cable, couple to the reset line, and suddenly reset your board without any visible explanation.


This is simple to avoid if the stackup is designed correctly and the right filters are in place.


However, this requires you to think in terms of energy and fields rather than electrons flowing through conductors.


If you were to think only in terms of electrons, you wouldn’t even consider this a problem.


After all, the electrons are well-contained within the conductor, so there’d be no issues with traces crossing splits in planes or contaminating other traces with crosstalk.


Unfortunately, this is how many designers approach PCB design, and this is why EMC failure rates are so high.


But there is a better way to design electronics and pass EMC test, and in this simple demonstration, I hope you see how we can address such issues at earlier stages, like during the design process.


I told you EMI was not black magic.


-Dario


P.S. Want to catch EMC/EMI problems before they bite?


Grab my new EMI Control Guide here:




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