GROUNDED: EMC/EMI & PCB Design Nuggets

I’m mainly addressing those who think skipping "GND" layers or swapping them for segmented power layers will save big money in production.

This is a misconception.

A lie often spread by project managers without a proper electrical or electronic background.

Yes, fewer layers mean a cheaper PCB, but that doesn’t guarantee your project will cost less overall.

The issue here is typically not a problem of cost increase, but a problem of wrong cost assessments to begin with.

In fact, cutting layers can set your project up for EMC failure, forcing you to repeat FCC/CE tests just to enter the marketplace, all because your field levels are out of control.

When you eliminate return and reference planes, you allow fields to spread uncontained and let current loops grow larger.

This breaks a fundamental principle of electromagnetism:

🔹 Uncontained, spreading fields = high emissions

🔹 Large current loops = high emissions

Result? Your project fails EMC tests.

Consequence? Your product can’t be sold.

Imagine spending thousands of dollars on repeated lab trips and expert consultants to fix a simple issue that’s now too late to correct.

What you "saved" upfront has now doomed your project to failure.

The solution? Choose the right stackup from the start.

Yes, keep cost savings in mind, but don’t compromise your EMC performance.

A well-designed stackup can improve results early on and save you significant money in the long run.

-Dario

P.S. If you’re unsure whether your stackup is both cost-effective and optimized for EMC compliance, I’ve created a guide on the top 10 PCB design mistakes for EMI control.

The EMI stackup is the first topic covered. It’s practical, hands-on, and designed to help you pass EMC tests faster. Grab my new EMI Control Guide here: