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GROUNDED: EMC/EMI & PCB Design Nuggets

Public·20 members

Dario Fresu

PCB Hacker - Team

PCB Hacker - Founder

You’ve just failed a radiated emission test during an FCC (or CE) EMC compliance evaluation for your system.


Picture this: You’ve just failed a radiated emission test during an FCC (or CE) EMC compliance evaluation for your system.


There are two possible culprits:


- Emissions from common-mode currents

- Emissions from differential-mode currents


Today, let’s focus on the differential-mode currents.


In the diagram below, you can see the key factors you can tweak to reduce radiated emissions from differential-mode currents:


🔹 Reducing the frequency (f).

🔹 Reducing the current (Idm).

🔹 Changing the angle (θ) and radius (r) from where you measure the E-field.

🔹 Reducing the area (A) of the current loop.


In many scenarios, the only option available to an electronic designer is the last one: reducing the area enclosed by the current loop.


Now you can see why stackup is so important!

And this is many designers’ missing link!


If you can picture signal propagation in the PCB, you’re halfway to mastering EMI control.


A two-layer PCB with both layers used for signals, or a multilayer PCB where the "GND" plane (Return Reference Plane, or RRP) is misplaced, will increase the loop area and cause trouble!


The simplest rule to avoid this is to minimize the distance between the signal layer and the RRP, as shown in the PCB section of the diagram.


This also means that having an RRP is a requirement, not an option.


Sometimes, EMI control can be that simple.


But, of course, it’s not always easy to implement.


-Dario


P.S. Want to make passing EMC tests on the first try a routine?

Grab my new EMI Control Guide Here:



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