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  • Writer's pictureDario Fresu

EMC Design for PCBs: Be aware of using Power Planes as Return Reference Planes!

Back when I started designing PCBs I heard it was pretty common to use power planes as Return Reference Planes (RRP), and I still see that this is widely used in the industry.

An example is the "classic" 4-layer stackup:


  • SIGNAL

  • POWER

  • "GROUND"

  • SIGNAL


One of the problems we have with this stackup is that the signal on the top layer uses the power plane as a path for the current to close the loop and return to the source.

But how does it actually close the loop if the POWER plane is DC disconnected from the "GROUND" plane?


Unfortunately, it does so through the displacement current, which has to cross the impedance between the POWER plane and the "GROUND" plane.


This means that when this happens, the current flowing through the impedance between the planes will generate a voltage drop, which will impact the whole board and eventually affect EMI.


And yes, I know the common recommendation is to add decoupling capacitors, but unfortunately, this will only work up to certain frequencies due to the impedance profile of the capacitor.


The best scenario is to have the Return Reference Plane adjacent to the signal layer.

However, if we are forced to use the power plane option, make sure that the impedance between the POWER plane and the "GROUND" plane is as small as possible so that the voltage drop is minimized.


One way to achieve this is to reduce the distance between the planes as much as possible, which will increase the interplane capacitance and lower its impedance.


I hope this helps,

Dario

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