Most engineers copy a stackup from a previous project and spend months paying for that ten-minute decision. Eight resources teach you to make it correctly — from field containment physics to validated 2-layer, 4-layer, 6-layer, and 8-layer configurations.
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Eight sections from EM field containment physics to mixed-signal partitioning. The full framework in one document — the reference you return to on every new project.
Ten chapters, each ending with a quiz. From the two-layer board problem to mixed-signal partitioning. Progress is saved between sessions.
A4 landscape, print-ready. Pairing configurations 2L–8L, key formulas, topology guide, and 10 common mistakes. Print it, keep it at your desk.
Browse validated 2L–8L configurations with EMC ratings. Filter by signal speed, power complexity, and mixed-signal requirements. Includes invalid configs with failure explanations.
Microstrip and stripline Z₀ (IPC-2141A / Wadell). Live sensitivity analysis — see how ±10% variation in Dk, trace width, or dielectric height shifts your impedance before the stackup goes to the fab.
22 binary items across 6 categories with a real-time EMC score. Run this before every layout — every unchecked item is a known risk you're accepting.
Build your stackup layer by layer. Live SVG cross-section, real-time EMC score, and violation detection based on the pairing rule. Test any configuration before committing.
10 key terms and 8 design rules. Flip to reveal definitions and rule explanations. Track what you know and what needs review.
All 8 resources are included with the PCB Design Skool Standard membership. When the series gets new tools or chapters, you get them automatically. Your membership also includes the other minicourses, the EMI Control masterclasses, and the community.
Go in order to build the full mental model, or jump to the chapter where your gap is. Progress is saved between sessions.
Not the afterthought. The field containment architecture of the whole board.
The most common EMC mistake. Why copper pours on the sides fail.
SIG ↔ RRP. PWR ↔ RRP. Every valid stackup follows from this one rule.
Right, wrong, and why. SIG/RRP/RRP/SIG vs the common default.
The formula, the noise, and when power planes are acceptable.
Choosing where your signal lives. Field containment and topology selection.
Skin effect, dual-side referencing, and when to move to more layers.
Return path planning at the stackup stage. Return via placement rules.
Mechanical constraints and why asymmetric stackups warp during lamination.
Separation without splitting. The slot antenna mechanism. ADC reference discipline.
Lead Hardware Engineer at ETH Zurich on a medical device taken through full IVD certification. EMC and high-speed design consulting for Fortune 500 companies. Expert Author for Altium. The pairing rule and field-containment framework in this series are the same ones applied on boards that had to pass — not theory assembled for a course.
From Dario's work with engineers applying the same first-principles approach taught in this series.
“I would like to express my special thanks to Dario Fresu for his valuable guidance and support in making the system compliant with EMI/EMC standards. This achievement marks an important milestone in my professional journey of understanding, analyzing, and solving complex EMI/EMC challenges in high-power inverter systems.”

The next board's architecture will be designed, not inherited.
Part of PCB Design Skool. Included with the Standard membership — $19/month →
Complete the set: PDN Design Series · Signal Integrity Series
No. The Stackup Series is fully self-contained — it covers field containment from first principles. If you have the other series, you'll see how the three subjects connect. If not, this one stands alone.
Every chapter connects physics to a design decision you make on a real board. The only formulas present are the ones you'll actually need: interplane capacitance, stitching via spacing, impedance. Theory is the tool, not the subject.
Chapters 01–05 are specifically about 2-layer and 4-layer boards. The Stackup Builder and Generator both default to 4L, and the Cheatsheet covers 4L configurations in full. Start there.
The fab's table tells you what they can build, not what your board needs. This series gives you the rule that generates every valid configuration, the reasoning to choose between them, and the tools to verify impedance and audit the result before layout starts.
Nothing. Everything runs in your browser — the tools, the minicourse, the printable cheatsheet. No app to download, no simulation platform required.
Join PCB Design Skool on the Standard membership and the full series unlocks inside the community — every resource in your browser, available immediately.